Design and Implementation of Hybrid DC-DC Converter: A Review

The advancement in Power Management Integrated Circuit (PMIC) has driven the DC-DC conversion technology into a System-on-Chip (SoC) solutions, leveraging CMOS scaling from 180nm to 22nm and on-chip passive element integration. Concurrently, as applications demand smaller form factor solution towards device portability with optimized power qualities, switched-capacitor-inductor hybrid architectures fully-integrated passives have become popular choice for compact high efficiency converter solution, contrast bulky discrete component based alternatives. This article reviews latest advancements dc-dc topologies, specifically low-power address downsides such charge sharing loss, current ripple, limited ratio, low density efficiency. An overview of capacitor inductor is discussed terms parasitic losses, miniaturization. A comprehensive comparison state-of-the-art work tabulated primary performance metrics, highlighting their operability applications. Moreover, discussion included quantified benchmarks justify viability converters, along future recommendation realizing ultra-high switching frequency footprint design approach resolve tradeoff bottlenecks.